In certain applications for which memory is required, new data to be written to the cells of a memory array are available before existing data is read from those cells. For example, when buffering packets of data during asynchronous transfer mode (ATM) switching, new data packets are presented to memory at the same time as existing packets can be read from memory. In such applications, it would be desirable to read the existing data and write the new data to the memory cells within a single memory cycle, so as to achieve maximum performance for a selected clock speed. It also would be desirable to minimize power consumption during memory operations.